1. Field of the Invention
The present invention relates to software graphics editors. More specifically, a method and related system are disclosed that enable a user to generate schematic diagrams.
2. Description of the Prior Art
Schematic diagrams are widely used to illustrate relationships between the parts of a system. Such diagrams include functional block diagrams, flowcharts, logic diagrams, circuit schematics and flow sheets, to name a few, and are broadly characterized in that they contain components that are interconnected by lines. The components are typically geometrical shapes, or standard shapes recognized amongst professions, that symbolically represent physical components or processes in the system. The interconnecting lines indicate relationships (mechanical, electrical, procedural, etc.) between the components so connected. Schematic diagrams are one of the most effective means of conveying broad information about a system, and are thus extremely useful in conveying knowledge. There exists a great deal of software in public use that enables users to design, edit and print schematic diagrams. However, despite the availability of such sophisticated software, the creation of a good schematic diagram continues to require a great deal of time, much of it spent in the tedious editing of the spatial positioning of the components and interconnecting lines.
As a general guideline, a good schematic diagram should: demonstrate the interconnectedness of components, reflect the existence of logical clusters, minimize the number of intersections and jogs in the connection lines, and efficiently utilize the available drawing area. Schematic diagram generation systems must provide a number of editing features that enable a user to create a schematic diagram. At a minimum, the user must be able to specify the positions and sizes of the components, the position of pins on the components, and the routes the connection lines follow between their respective pins. As used here, the term “pin” indicates the end-point or start-point position of a connection line on a component. Each connection line thus has at least two pins. As the number of components and connection lines increase, so too does the difficulty in creating the schematic diagram. Moreover, there are times when a user may want to create two or more schematic diagrams of the same system, with each diagram emphasizing a different aspect of the system. This is termed changing the topology of the schematic diagram, as it involves the spatial reorganization of the components with respect to each other. Changing the topology of an existing diagram is a time-consuming task when using current editor software packages.
As a first step in creating a schematic diagram, the editor software creates a “netlist”, which holds information about the positions and sizes of components, and the routing of connection lines between these components. The netlist may be loaded from permanent memory (such as a hard disk, CD, etc.), or it may be created from scratch, and is used by graphics software within the editor to draw the corresponding schematic diagram on a display of the computer. As the user makes changes to the schematic diagram as presented on the display, the editing software makes corresponding changes to the netlist. The netlist is, in effect, the internal representation of the schematic diagram within the memory of the computer. As such, its exact nature is a design choice that will vary from program to program, and it is pointless to go into specific details of its organizational structure. The construction and use of such netlists is well known in the art. Netlists may also be generated automatically by specialized software that parses other higher-language files. Examples of this include the parsing of hardware description language (HDL) files to obtain a netlist for a circuit schematic. After the netlist is loaded into memory, the user is free to change the position of the components, the sizes of sizable components, the positions of floating pins, and the routing of the connection lines. As used here, a “floating pin” is one that is not constrained to a specific position on its component. Please refer to FIG. 1. FIG. 1 is an example schematic diagram 10. The schematic 10 includes six sizable components (PLA, STK, REG, INC, OUT and MUX), and thirteen fixed-sized component 12 for a total of 19 components. Numerous connection lines 14 run between the various components, and are in the form of an arrow to indicate the flow of data between the components. The components may be classed with reference to a connection line 14 as a “source component” or a “load component”, the terminology being adopted from the electronics profession. The connection line arrows 14 have their tails anchored on a source component, and their heads pointing to a load component. Depending on the connection lines 14 being considered, the same component may be both a source and a load, as it may both be pointed to by a connection line 14, and point at another component via a connection line 14. A user must spend a fair amount of time to generate the schematic 10, carefully positioning and sizing the components, and routing the connection lines 14. However, the topology of the schematic 14 is based upon an idea or theme that the user is trying to impart. To emphasize or indicate a different idea, the user may wish to change the topology of the schematic 10. FIG. 2 illustrates this concept. FIG. 2 shows the schematic 10 with a different topological layout, thereby presenting a new schematic 20. In many editing packages, changing the schematic 10 to look like the schematic 20 can be almost as time-consuming as making the original schematic 10. For example, some editing software does not explicitly remember the connectivity of the various components. Hence, when a component is moved, such as component PLA, the connection lines 14 associate with the component do not move with the component. Each connection line 14 must therefore be re-routed, and the positions of its pins re-positioned. Other editor packages may keep track of the connectivity of the components, but they generally perform a rather crude auto-routing function that has connection lines 14 crossing over and through components. This is shown in FIG. 3. FIG. 3 is an example schematic with connection lines 14 generated by a simple auto-router. It's clear from FIG. 3 that a user will have to spend a great deal of time “cleaning up” the connection lines 14 generated by the auto-router. Finally, and what is least obvious, is that during the design and construction of a schematic, the user may lose focus of the theme which he or she is trying to convey due to the complexity of the connection lines 14. That is, it is not always a quick and easy task to determine which components are connect to which other components. The very presence of so many connection lines and pins can make simple changes to the topology of the schematic more difficult, as poorly routed connection lines and pins during intermediate stages of the design process can actually obscure the flow of information that is to be conveyed by the schematic diagram. Such obfuscation is also present in FIG. 3.